1. Field of the Invention
The invention relates in general to an envelope detector and associated method, and more particularly, to a low-cost, low-power consumption, simple structured and compact envelope detector, suitable for high frequency differential signal squelch detection, and associated method.
2. Description of the Related Art
A modern communication system usually comprises a mechanism for distinguishing whether an input signal is a to-be-processed signal carrying valid information, or simply noise. In general, an input/output (IO) interface of a communication system chip is coupled to an external electronic device/circuit/chip via a cable and/or a trace on a circuit board in order to receive information/messages transmitted from the external electronic device/circuit/chip. For example, an IO interface of a communication system chip may comprise an input port, e.g., a pair of differential input pads, for receiving data of differential transmission (e.g., information and/or digital payload).
The communication system chip performs squelch detection on a signal level (e.g., a voltage level) at the input port to identify whether the signal on the input port carries valid data. When no data is transmitted from a remote electronic device/circuit/chip, or a remote electronic device/circuit/chip is disconnected to the input port of the communication system chip, the signal on the input port of the chip contains only noise but not any valid data. Therefore, the communication system chip comprises a squelch detector coupled to the input port, for performing squelch detection on the input port to identify whether the signal on the input port is noise or real data. The squelch detector provides a squelch detection signal to reflect a detection result. When the signal on the input port is determined as carrying real data, a digital data circuit for interpreting data in the communication system chip then starts retrieving and interpreting the data in the signal according to the indication of the squelch detection signal.
FIG. 1 shows a schematic diagram of a conventional squelch detector 10; FIG. 2 shows a timing diagram of waveforms of associated signals in FIG. 1, with a horizontal axis representing the time and a vertical axis representing a signal level. The squelch detector 10 comprises a summing and subtraction circuit 12, a reference level generator 14, a mixer 16, a comparator 18, a sampling circuit 20, and a supporting circuit 22. The supporting circuit comprises a clock generator 24, a bias circuit 26, and a regulator 28.
Operations of the convention squelch detector 10 are described as follows. The summing and subtraction circuit 12 receives an input port signal Vin. For example, the signal Vin comprises a pair of differential signals, which are represented by waveforms in a solid line and a dotted line. The reference level generator 14 generates a plurality of quantized reference levels. The summing and subtraction circuit 12 then generates differential signals Vin1 and Vin2 according to the level of the signal Vin and the quantized reference levels. The signal Vin1 corresponds to the signal Vin, while the signal Vin2 is a reference signal for squelch comparison. The mixer 16 performs mixing (e.g., multiplication) on the signals Vin1 and Vin2 to forcibly amplify the signals to further generate a signal Vinc and a reference level Vref0. The signal Vinc corresponds to the waveform of the signal Vin, and the reference level Vref0 is a constant envelope comparison standard. The comparator 18 compares the signal Vinc and the reference level Vref0, and reflects a comparison result in a signal Vcp. For example, when the signal Vinc is greater than the reference level Vref0, the signal Vcp is at a high level, or else the signal is at a low level. The sampling circuit 20 performs high-speed sampling on the signal Vcp according to a sampling clock CKS to obtain a continuous squelch detection signal for determining whether the signal Vin is a to-be-processed signal carrying real data. For example, when the signal Vcp stays at the high level for a predetermined period, it is determined that the signal Vin carries real data.
In the conventional squelch detector 10, the summing and subtraction circuit 12 requires a large resistance to form a voltage dividing network in order to generate the reference signal for squelch comparison. The provision of the voltage dividing network is not only highly power consuming but also occupies a large layout area. To support operations of the summing and subtraction circuit 12, the supporting circuit 22 also needs to include the voltage regulator 28 and the bias circuit 26 to generate a constant voltage level. Meanwhile, the mixer 16 multiplying and amplifying the signals is also quite power consuming.
Furthermore, it is necessary for the comparator 18 to be a high-speed comparator. In the modern 10 technique, high-speed signals are utilized to carry high-speed data/messages in order to increase a data/message transmission rate. Since the comparator 18 is required to compare high-frequency signals and send out high-frequency results, it is necessary for the comparator 18 to be a high-speed comparator; whereas, the high-speed comparator also suffers from the drawbacks of having high power consumption and a large layout area. Similarly, for that the sampling circuit 20 samples the high-speed comparison results from the comparator 18 and determines the squelch according to the accumulated sampling results, the sampling circuit 20 needs to operate at an even higher speed sampling clock rate, meaning that a significant power consumption is required. To support operations of the sampling circuit 20, the supporting circuit 22 further comprises the clock generator 24 to generate the high-frequency sampling clock CKS that again increases the consumption of power and area. In addition, misjudgment is likely to be incurred when the squelch is determined solely based on sampling.
The input port of a chip is prone to coupling to various noises and interferences via the cable and/or the trace on the circuit board. For example, when the remote electronic device is connected to the input port via the cable, a transient state is transmitted to the input port of the chip. For the differential input pads on the input port that receive a pair of differential signals, the transient state is at the same time and with a same phase coupled to the pair of differential signals to undesirably affect common mode parts of the differential signals. At this point, the pair of differential signals are increased due to the transient state. Since the conventional squelch detector 10 compares and performs the squelch detection based on a constant reference level, the transient state is determined as data due to the high level of the transient state, such that the digital data circuit starts data retrieval with respect to the signal on the input port. However, regardless of whether the signal on the input port carries real data, the signals are already distorted being affected by the transient state, and any data obtained from data retrieval is hence erroneous. More specifically, the conventional squelch detector 10 is incapable of eliminating undesirable effects of the common mode noise resultant from the transient state.